Flash memory is a form of electrically-erasable programmable read-only memory (EEPROM) with the following characteristic: a portion of the memory is erased before data are written in the erased portion of the memory. However, a conventional EEPROM erases data on a bit-by-bit level, while a flash memory erases data on a block-by-block level. These blocks are usually referred to as physical blocks of memory, by contrast to logical blocks of memory. The size of the physical block may vary from one byte to a plurality of bytes. Thus, a physical block on a flash memory is erased before new data is written to this physical block of the flash memory. One advantage of flash memory (and more generally of EEPROM) is that it is a nonvolatile form of memory, which does not require power to preserve stored data with integrity, so that a device embedding a flash memory can be turned off without losing data.
The flash memory is weared by erase operations performed on the physical blocks of the flash memory. The manufacturer of the flash memory generally provides a life expectancy of the flash memory expressed in a limitation on the number of erase operations which can be performed. For example, the flash memory can support 10 000 erase operations on physical blocks, or the flash memory can support an average of 350 physical blocs being erased per hour for a duration of 10 years.
It is very difficult to predict how many erase operations will be performed on the memory, and when they will be performed, since it depends entirely on host device(s) (e.g. a processor) accessing the flash memory for storing data. Thus, a flash memory supporting an average of 350 physical blocs being erased per hour for a duration of 10 years may last only one or two years, if the host device(s) (e.g. a processor) accessing the flash memory generates more than 350 erase operations per hour on average (e.g. 1500 or 3000 erase operations per hour on average).
Therefore, there is a need for a new memory device comprising flash memory and a new method for controlling a write speed of a bus transmitting data for storage on the flash memory, in order to control the number of erase operations performed on the flash memory.